1. Field of the Invention
The present invention relates to a discharge circuit of a display device, and more particularly, to a discharge circuit which can discharge a gate off voltage of a liquid crystal display (LCD) at high speed.
2. Description of Related Art
Generally, a liquid crystal display (LCD) is a sort of Flat Panel Display (FPD), which displays images by using liquid crystals. Since the LCD is thinner and lighter than other FPDs, uses a low driving voltage and has low power consumption, it is widely used in portable computers and other portable devices.
FIG. 1 is a block diagram of a conventional LCD.
Referring to FIG. 1, the LCD includes a timing control circuit 101, a gate drive circuit 102, a source drive circuit 103, a gray scale voltage generation circuit 104, a liquid crystal panel 105, and a gate on/off voltage generation circuit 106.
The timing control circuit 101 receives red (R), green (G) and blue (B) color signals RGB, a horizontal sync signal HSYNC, a vertical sync signal VSYNC and a clock signal CLK, and generates a plurality of control signals for controlling operations of the gate drive circuit 102 and the source drive circuit 103.
The gate drive circuit 102 operates in response to the control signals inputted from the timing control circuit 101, and receives a gate on voltage VGH and a gate off voltage VGL from the gate on/off voltage generation circuit 106 to control an operation of the liquid crystal panel 105. The gate on/off voltages VGH and VGL are used for turning on/off a thin film transistor (TFT) included in the liquid crystal panel 105.
The source drive circuit 103 receives a gray scale voltage having a plurality of voltage levels from the gray scale voltage generation circuit 104 and transfers the gray scale voltage to the liquid crystal panel 105 in response to the control signals inputted from the timing control signal 101.
The liquid crystal panel 105 includes a plurality of gate lines G0 to Gn, where n and m are natural numbers, and a plurality of data lines D1 to Dm arranged perpendicular to the gate lines G0 to Gn. In addition, the liquid crystal panel 105 includes a plurality of pixels at intersections of the data lines D1 to Dm and the gate lines G0 to Gn.
Each of the pixels includes a TFT, a storage capacitor Cst, and a liquid crystal capacitor Cp. The TFTs have gates connected to the gate lines G0 to Gn, and the sources connected to the data lines D0 to Dm, respectively. Moreover, first terminals of the liquid crystal capacitors Cp and first terminals of the storage capacitors Cst are connected in parallel to drains of the TFTs. The other terminals of the liquid crystal capacitors Cp are connected to a common electrode, and the other terminals of the storage capacitors Cst are connected to a preceding gate line.
Generally, the TFTs serve as switching elements. When the TFT is turned on, the liquid crystal capacitor Cp is charged with a gray scale voltage applied from the gray scale voltage generation circuit 104 through the data line. When the TFT is in a turned-off state, it prevents leakage of the voltage charged in the liquid crystal capacitor Cp. A voltage required to turn on the TFT is referred to as the gate on voltage VGH, and a voltage required to turn off the TFT is referred to as the gate off voltage VGL.
The driving characteristics of the LCD of FIG. 1 will be described briefly.
Referring to FIG. 1, when the gate on voltage VGH is applied to a first-row gate line G1, all first-row TFTs TFT1 connected to the first-row gate line G1 are turned on. At this point, the gray scale voltages applied from the source drive circuit 103 through the data lines D1 to Dm are applied to the liquid crystal capacitors Cp1 and the storage capacitors Cst1 through the TFTs TFT1, respectively. Consequently, the liquid crystal capacitors Cp1 are charged with voltages corresponding to a voltage difference between the gray scale voltages and a common electrode voltage, and the storage capacitors Cst1 are charged with voltages corresponding to a voltage difference between the gray scale voltages and the gate off voltage VGL of a preceding gate line G0. Furthermore, storage capacitors Cst2 of a next row, which are connected to the first-row gate line G1, are also charged.
In this state, in case where an external power supply voltage is shut off due to external impulses or power failure so that the drive circuit of the liquid crystal panel 105 is abnormally stopped, a short time is taken until the charged voltage of the storage capacitor Cst and the charged voltage of the liquid crystal capacitor Cp are completely discharged. This is because the TFT is turned off by the shut-off of the power supply voltage so that its drain is floated, and thus the charged voltage of the storage capacitor Cst and the charged voltage of the liquid crystal capacitor Cp are naturally discharged. Accordingly, even though a user shuts off the power supply voltage, image sticking is generated by a gradual discharge.
The time taken to discharge electric charges may be long or short according to the gate voltage-channel current characteristic of the TFT. In the drive circuit of the liquid crystal panel, the gate off voltage VGL drops to 0 V (ground voltage level) in several tens milliseconds to several hundreds milliseconds after the external power supply voltage is shut off. The electric charges charged in the liquid crystal panel 105 are discharged from that point so that a screen becomes normally black or normally white.
In this way, in case where quid crystal panel 105, i.e., the drive circuit is turned off by the shut-off of the external power supply, the gate off voltage VGL must quickly be discharged to 0 V in order to prevent image sticking on the screen. According to the known methods, the gate off voltage VGL is discharged by using a resistor R disposed inside the drive circuit or a module external to the drive circuit, as illustrated in FIG. 2.
However, the typical methods using the resistor R as illustrated in FIG. 2 are much influenced by the resistance of the resistor R. For example, when the resistance of the resistor R is high, the discharge speed of the gate off voltage VGL becomes slower and thus image sticking occurs. On the other hand, when the resistance of the resistor R is low, the discharge speed of the gate off voltage VGL increases. However, in a normal state, an excessive leakage current flows from the gate off voltage VGL to the ground voltage terminal. Consequently, burdens are imposed on a booster circuit generating the gate off voltage VGL.